Current ratings and current limits are a critical part of power electronic design. For example, active switching devices, such as MOSFETs, IGBTs or the like, have limited tolerance to current overload conditions. Indeed, saturation in magnetics, e.g., inductor saturation, is a performance limitation to avoid.
The actual failure mechanism that dictates performance limitations, however, can include thermal or fusing effects and/or dynamic limits such as di/dt limitations due to current crowding. To overcome failure with these switching devices, the duty ratio, i.e., the ratio of the ON portion of a cycle or pulse to the total time of the cycle or pulse, controls the switching function.
Referring to FIG. 1, there is shown a typical boost converter circuit 10. Boost converter circuits 10 are particularly sensitive to abnormalities, such as partial saturation of the boost inductor 15. Partial saturation is especially pronounced when several interleaved/parallel converters are controlled with a digital signal processing (DSP-)based controller. The information on the sampled current in each pulse-width modulation (PWM) pulse alone is inadequate as a prediction tool. More problematic, when deriving any duty-cycle constraint, there is an inductor current peak within each switching cycle. To complicate matters further, that peak current is not observable using standard DSP control techniques.
Conventional DSP controllers sample current at a pre-designated point within the PWM switching cycle, e.g., at or near the leading edge or the trailing edge of the cycle. However, the peak current for any cycle typically occurs contemporaneously when the switch changes state, i.e., going from OFF to ON. Furthermore, this operation is controlled by a hardware comparator that compares current measurements with a threshold current.
Although it is possible to build dedicated circuits to sample peak currents or, alternatively, to use software comparators to determine the instant of a switch state change, these techniques require additional hardware and/or computational overhead. Even if current were sampled accurately and in near real-time, current systems are not equipped to use this data to limit the current in the circuit.
Despite numerous publications on the benefits that digital control brings to power converters, few detailed techniques for limiting the instantaneous value of current have been published. There are, however, two major trends in controlling switch-mode converters. One calls for a PWM technique that utilizes linearized state-space averaging of a switched-mode converter and the other makes use of a current-mode control.
Use of linearized state-space averaging of a switched-mode converter is far more convenient for a DSP-based controller. Indeed, linear control techniques and linear control algorithms can achieve system performance and response in a manner that is well understood.
On the other hand, current mode controllers (CMC) control the peak value on a pulse-by-pulse basis automatically. A conventional CMC is hybrid controllers having a linear control implementation in an outer loop. However, these CMCs have some major drawbacks in industrial DC-DC converters, e.g., noise sensitivity and additional complexity. Furthermore, most modern converters use a form of digital control implementation, i.e., most modern converters are, typically, DSP-based.
Most forms of non-linear control use system models to predict performance and, moreover, make necessary adjustments based on the present state and input conditions, which is to say, before a change has occurred in the output(s). This is referred to as “feedforward” control.
It would be desirable to provide devices, systems, and methods to limit current in circuits without introducing unwanted noise sensitivity. Moreover, it would be desirable to provide devices, systems, and methods that address both inductor current saturation and maximum allowable device current; especially in an interleaved boost converter such as are being developed for hybrid electric vehicle propulsion buses.
It would also be desirable to provide an improved digital implementation of a new current limiting method that allows for over-current limitation on a pulse-by-pulse basis.
It would also be desirable to provide devices, systems, and methods that can realize these benefits without the addition of external circuitry or sensors.